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Intel Memory Model
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1	Moguls: a Model to Explore the Memory Hierarchy for Bandwidth Improvements Guangyu Sun†, Christopher Hughes§, Changkyu Kim§, Jishen Zhao†, Cong Xu†, Yuan Xie†, Yen-Kuang Chen§ † Add to Reading List Source URL: pcl.intel-research.net Language: English - Date: 2014-12-03 02:39:22
2	1 Remote Memory Access Programming in MPI-3 Torsten Hoefler, ETH Zurich James Dinan, Intel Corporation Rajeev Thakur, Argonne National Laboratory Brian Barrett, Sandia National Laboratories Add to Reading List Source URL: htor.inf.ethz.ch Language: English - Date: 2014-12-04 09:45:54 Computing Concurrent computing Software engineering Parallel computing Transaction processing Computer memory Application programming interfaces Programming paradigms Message Passing Interface Partitioned global address space Synchronization Consistency model
3	A Component Model of Spatial Locality Xiaoming Gu Intel China Research Center Beijing, China Joint work with Ian Christoper, Add to Reading List Source URL: sysrun.haifa.il.ibm.com Language: English - Date: 2009-08-27 04:46:16 Cache Computer memory Computing Software optimization Locality of reference Computer engineering CPU cache Reuse
4	GTEK, Inc. Model 7228 Table of Contents Add to Reading List Source URL: 017b236.netsolhost.com Language: English - Date: 2007-03-05 16:26:00 Electronics Embedded systems Computer hardware Intel HEX Hex ASCII EPROM Binary file Hex dump Computing Computer memory Non-volatile memory
5	1. Introduction The purpose of this paper is two fold. The first part gives an overview of cache, while the second part explains how the Pentium Processor implements cache. A simplified model of a cache system will be ex Add to Reading List Source URL: download.intel.com Language: English - Date: 2006-12-19 16:48:38 Cache coherency Cache Central processing unit CPU cache MESI protocol Pentium Pro Bus sniffing Dynamic random-access memory Cache on a stick Computer hardware Computer memory Computing
6	ThinkPad® X220Onsite (MayType-model Processor Memory 4291-48U 4291-47U Add to Reading List Source URL: www.lenovo.com Language: English - Date: 2011-12-01 17:50:10 Centrino PCI Express Nvidia Ion Intel Solid-state drive DisplayPort ThinkPad X Series ThinkPad T Series Computer hardware Electronics ThinkPad
7	Adventures with LLVM in a magical land where pointers are not integers David Chisnall Approved for public release; distribution is unlimited. This research is sponsored by the Add to Reading List Source URL: llvm.org Language: English - Date: 2015-02-01 09:35:16 Data types Primitive types Pointer C LLVM 64-bit Type safety Intel Memory Model Tagged pointer Computing Software engineering Computer programming
8	Model checking transactional memory John O’Leary Intel Bratin Saha Intel Add to Reading List Source URL: www.markrtuttle.com Language: English - Date: 2011-09-30 00:00:00 Data management Data Software transactional memory Transactional memory Model checking Linearizability Parallel computing Promela Lock Concurrency control Transaction processing Computing
9	Model checking transactional memory with Spin John O’Leary Intel [removed] Bratin Saha Add to Reading List Source URL: www.markrtuttle.com Language: English - Date: 2011-09-30 00:00:00 Data management Data Software transactional memory Serializability Linearizability Transactional memory Schedule Non-blocking algorithm Transmission Control Protocol Concurrency control Transaction processing Computing
10	Intel® X18-M/X25-M SATA Solid-State Drive 34 nm Product Line Model Codes: SSDSA2M080G2XX, SSDSA1M080G2XX, SSDSA2M120G2XX, SSDSA2M160G2XX, SSDSA1M160G2XX Add to Reading List Source URL: download.intel.com Language: English - Date: 2011-09-20 21:00:17 Non-volatile memory X25-M IOPS Intel Solid-state drive Native Command Queuing Hard disk drive Flash memory TRIM Computer hardware Computing Serial ATA

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